DSPHLF SPEC SHEET

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DSPHLF -- click for large photo

Not recommended for new designs.

DSPHLF DSP Coprocessor Features

   • 50 MHz Agere DSP32C CPU
   • 1 MByte of SRAM memory
   • DSP32C serial port on back bracket
   • Requires PC ISA bus slot
   • Application software with source
   • Price $1150
   • Specs Table

Product Description

The DSPHLF coprocessor board features the Agere DSP32C chip which offers 50 MHz, 25 Mflop floating point power with 24 bit address and 32 bit data buses for speed and accuracy.

The DSPHLF uses a 16 bit ISA bus interface to the DSP32C PIO that allows all of the on board memory to be accessed by the PC while the DSP32C is executing. The DSPHLF is populated with 1 MB of SRAM memory and includes a high speed, fully buffered serial interface with a convenient header on the back bracket. Note that this interface is not plain RS232, but is instead a serial connection to the DSP32C for interfacing with codecs and other serial I/O devices. A complete software package is also included so you have everything you need to begin developing applications immediately. The DSPHLF comes bundled with the DSPA64 as part of the DSPA64/HLF data acquisition system. However, it can also be purchased separately.

All the software you need to develop stand alone or integrated PC DSP32C applications comes with the board. This software includes an assembler, full screen symbolic monitor/debugger, C callable math library, and many graded examples to help you get started. Source code for the entire system is included and provides a base for developing custom applications. The PDF user manual includes circuit diagrams.

For additional information see:  Manual Excerpts,  Software,  DSPA64/HLF,  DSPMOD

Specifications Table